Paging A memory Management an approach web page : one of countless equally sized chunks of storage page Table: stores wherein in storage each page is Main memory : split into web page frames, a space large enough to host one web page of data ( e.g. 4k ) Swap an are : divided into pages i think the complete procedure is very first loaded into the swap space an ext pages go back and forth between swap space and main memory as soon as a routine is loaded, placed it into the swap room memory and page size is constantly a strength of 2 address Translation v Paging for each procedure there is an deal with A once doing computations, always truncate 1. Page number = A / page_size this is the web page number in ~ the process address space e.g. Resolve in the process, A = 10,000 web page size = 4k web page number = 10000 / 4k = 10,000 / 4096 = 2.xxx = truncate come 2 this calculation is done easily on the computer due to the fact that the web page sizeis power of 2, e.g., 4k = 2^12 to identify the page number, change the attend to right by 12 bits if the virtual address size = 32 bits, then due to the fact that the page size is 4k = 2^12,then the the last 12 bits give the web page offset, andthe first 32- 12 = 20 bits provide the page number Example attend to (in binary): --------------------------------------- | 10101010101010101010 | 101010101010 | --------------------------------------- 2. Balance out = A mode page_size this is the street from the start of the web page e.g. Deal with in the process, A = 10,000 page size = 4k page offset = 10000 mode 4k = 10,000 mode 4096 = 1908 this calculation is done conveniently on the computer since the web page sizeis strength of 2, e.g., 4k = 2^12 to determine the page offset, mask the end all but the rightmost 12 bits now calculate the physics address:
come compute the physics address: look increase the page number in the web page table and also obtain the frame number to create the physical address, framework = 17 bits; balance out = 12 bits; then512 = 29 1m = 220 => 0 - ( 229-1 ) if key memory is 512 k, then the physical resolve is 29 bits efficient Memory accessibility Time The percentage of times the a web page number is found in the associative registers is called the struggle ratio. An 80-percent fight ratio means that we find the preferred page number in the associative it is registered 80 percents the the time.If the takes 20 nanoseconds to search the associative registers, and 100 nanoseconds to access memory, then a mapped memory access takes 120 nanoseconds when the web page number is in the associative registers. If we fail to discover the page number in the associative registers (20 nanoseconds), then we must first access memory for the web page table and also frame number (100 nanoseconds), and also then accessibility the desired byte in storage (100 nanoseconds), for a complete of 220 nanoseconds. To uncover the effective accessibility time, we should weigh each situation by that probability: effective accessibility time = 0.80 * 120 + 0.20 * 220 = 140 nanoseconds. In this example, we endure a 40-percent slowdown in memory access time (from 100 to 140 nanoseconds). for a 98-percent hit ratio, we have actually effective access time = 0.98 * 120 + 0.02 * 220 = 122 nanosecondsThe increased hit rate produces only a 22-percent slowdown in memory accessibility time. The hit ratio is clearly related to the variety of associative registers. With the variety of associative it is registered ranging in between 16 and 512, a hit ratio of 80 to 98 percent have the right to be obtained. come do page table look-ups quickly: a translation lookaside buffer (TLB) is provided associative cache, whereby cache is the more quickly memory accessible and associative looks at every the entries at the very same time expensive fairly small just a few page number/frame number pairs deserve to be save on computer at when stores the entries from the many recently provided pages updated every time a page fault wake up web page Fault when a process tries to access an attend to whose web page is not at this time in memory process must be suspended, process leaves the processor and also the all set list, status is now ``waiting for main memory"" Address: deserve to be an deal with of an instruction, or of data (heap, stack, static, variables) Paging to work having " page in " => lug a page into main memory 1. Fetch plan a) demand fetching = need paging bring a page when it is referenced however not save on computer in key memory reasons a page fault at any time a brand-new page is compelled disadvantage - cold start fault: numerous page faults when a process is just beginning advantage - no unnecessary pages are ever fetched b) anticipatory fetching = prepaging guess i m sorry pages will certainly be compelled soon and also fetch them before they are referenced There room three variations: i) working collection prepaging make sure to fetch every pages in a process" working set before restarting functioning set: a set of pages accessed in the critical "w" working time devices where w = the window size based on temporal locality will is the all pages compelled soon are in key memory when the process starts ii) clustering prepaging when a web page is fetched, likewise fetch the next page(s) in the procedure address an are price of fetching n consecutive pages native disk is much less than fetching n non-consecutive pages common variant is to fetch pairs of pages at any time one is referenced the extra page may be prior to or ~ - offered in windows NT, windows 2000 iii) recommend prepaging programmer/compiler adds hints to the OS around what pages will certainly be necessary soon e.g. Hint: & myfunction problem: cannot trust programmers; they will certainly hint that all your pages are crucial 2. Placement plan identify where to placed the page that has actually been fetched easy for paging, just use any cost-free page framework 3. Replacement plan determines which page should be eliminated from main memory (when a page must be fetched) desire to discover the least advantageous page in main memory candidates, in stimulate of preference: 1. page of a terminated procedure 2.
You are watching: How to convert logical address to physical address in paging
See more: How Does Meiosis Create Genetic Diversity ? How Does Meiosis Create Genetic Diversity
page of a long blocked process danger: execute not desire to swap the end pages from a procedure that is make the efforts to bring pages right into main storage thrashing: wherein the system is preoccupied with moving pages in and also out of memory feature: the disk have the right to be really busy while the CPU is nearly idle one cure is to alleviate the variety of processes in main memory i.e., minimize the level of multiprogramming3. take a page from a ready procedure that has actually not to be referenced for a long time 4. take it a web page that has not been modified because it was swapped in saves copying to the swap an are 5. take a web page that has actually been referenced freshly by a ready process => performance will downgrade local versus Glogal page Replacement: local page replacement: when a procedure pages "against itself" and also removes few of its very own pages worldwide page replacement:when pages from all procedures are consideredExample: windows NT/XP/Vista usage both a regional page replacementmethod (based top top FIFO) and a an international page replacement method(based on PFF)
Table of components